Aspasia Palli and Theodore Antonakopoulos:

Interconnection Optimization in a Multi-Nodes Storage Architecture

The Work in Progress Session (DSD Part) of the Euromicro SEAA/DSD 2014 conference, Verona, Italy, August 27-29, 2014.

Abstract: Storage systems using solid-state non-volatile memories achieve relatively high performance, but in many cases is less than the maximum achievable performance of the used memory technology, due to their internal architecture. In this work, we propose an new architecture that uses a much higher number of less complex and with lower capacity storage nodes and a mesh topology that is optimized for minimum latency and maximum I/O performance. The storage nodes have to use a small number of memory channels, and multiple and operationally independent high-speed serial interfaces for data transactions between the various nodes. We present the basic system architecture and a methodology for designing the optimum topology for a given number of storage nodes and I/O interfaces per node. We also present details on prototyping such a system using the well-established PCIe technology and NAND Flash technology.

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