Antonios Prodromakis, Stelios Korkotsides and Theodore Antonakopoulos:
MLC NAND Flash Memory: Aging Effect and Chip/Channel Emulation
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Volume 39, Issue 8, November 2015, Pages 1052-1062.
Abstract: This work presents an FPGA-based
emulator that can be used for emulating NAND Flash memories, either at
the chip or at the channel level, along with the effect of aging on
their performance. The emulator is based on a reconfigurable hardware-software
architecture, which enables accurate representation of various NAND
Flash technologies, focusing especially on MLC cases. The presented
architecture can be used for emulating memories at the chip and channel
level, while the proposed hardware platform can be used as a valuable
tool for developing and evaluating memory-related algorithms and
techniques. In this paper, we analyze the architecture of the NAND Flash
memory emulator and we present details about its internal functionality.
Using experimental results, we demonstrate the high accuracy achieved
when it is used to emulate specific MLC and TLC NAND Flash chips and we
describe how this custom hardware can be used to emulate a complete NAND
Flash channel, which consists of multiple NAND Flash chips that share a
common data path and support the execution of pipelined commands.
If you need additional information
concerning this paper, please contact either one of the authors or send an e-mail to:
comes-sup@ece.upatras.gr
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